The present invention is related to an offset compensating apparatus for compensating a DC offset voltage of a D/A converter which is employed in, for example, a digital wireless telephone, and also related to a comparing circuit for measuring offset of a D/C converter, which is employed in this offset compensating apparatus.
In a digital wireless telephone, a signal to be transmitted is modulated in a digital circuit portion of a modulator. Thereafter, a modulated digital signal is converted into an analog signal by a D/A converter. The converted analog signal is coupled to a wireless frequency unit of the digital wireless telephone so as to be transmitted as a wireless signal. This D/A converter owns the following problems.
That is, there are some cases that DC offset having a low level, which is slowly changed, is produced in an analog output of the D/A converter. Normally, the occurrence of this DC offset is caused by such a reason that characteristics of circuit components could not be achieved as ideal characteristics, but has no relationship with respect to a digital signal which should be converted. However, when this DC offset is produced, an undesirable result may occur in the D/A converter, and thus, may interfere with a transmission of a wireless signal. As this undesirable result, a carrier wave is leaked in a transmission signal of a mobile telephone. As a consequence, it is desirable to compensate for the DC offset of the D/A converter.
To cancel the DC offset of the D/A converter, an amount of the DC offset must be measured as an initial condition. To perform this measurement, a comparator (voltage comparing circuit) is employed. Such a DC offset canceling arrangement is known in the technical field (see patent publication: Japanese Laid-open Patent Application NO. HEI-7-202693). In this known DC offset canceling arrangement, a control signal used to compensate offset is obtained based upon a comparison result made by this comparator in order to cancel the DC offset of the D/A converter.
As previously explained, in order that the DC offset of the D/A converter may be canceled, the offset amount must be measured by employing the comaprator. To measure the offset amount in a correct manner, as apparent from the technical principle, the offset of this comparator itself must be defined within a predetermined range. While a comparator (voltage comparing circuit) is mainly constituted by a differential amplifier, this differential amplifier (differential circuit) is designed in a manner that a right-sided current capability may be balanced with respect to a left-sided current capability. However, offset may be usually produced due to such a reason caused by fluctuations in actual sizes of transistors which constitute the differential amplifying circuit. It should be understood that this offset implies fluctuations contained in characteristics of the respective transistors which constitute the differential pair of this differential amplifying circuit.
The above-described offset amount of the comparator is considerably fluctuated, while this offset amount is produced due to the characteristic fluctuations as to the respective transistors which constitute the differential pair. There are some cases that this fluctuated offset amount is occasionally and largely deviated from the allowable range. In the case that the DC offset of the D/C converter is adjusted by employing the comparator having such an offset amount which exceeds the allowable range, namely in such a case that the offset adjustment of the D/C converter is carried out by the negative feedback control with employment of the comparator having the low comparison precision, the offset would be originally converged within several mV (millivolts). However, the following fact could be confirmed. That is, the offset higher than, or equal to 20 mV is still left in the D/A converter.
To solve the above-described problem, the offset (namely, offset of right/left current capabilities) as to the comparator must be necessarily canceled, while this comparator is used so as to cancel the DC offset of the D/A converter. However, it is practically difficult to provide such an exclusively-designed circuit capable of adjusting the offset of the comparator in view of the following points. That is, an increase of an occupied area of a semiconductor device (IC) must be prevented, or lower power consumption is required. The above-explained DC offset compensating method requires a separate means, since the precision of the comparator used to measure the offset amount of the D/A converter may constitute the very important factor.